US-based Cerebras engages SkyeChip for AI chip design work - KLSE Screener

US-based AI chip designer Cerebras has partnered with Malaysian semiconductor company SkyeChip Bhd to advance the development of next-generation AI computing chips. The collaboration focuses on design... Read original →

Cerebras’ engagement of Malaysia’s SkyeChip for 3nm-class high-speed interface IP reflects a calculated recalibration of supply chain resilience under U.S. export controls. Technically, this accelerates standardization of die-to-die interconnects and HBM integration in chiplet architectures, pressuring Synopsys and Cadence to fast-track low-power DDR and NoC IP. Compliance-wise, by confining collaboration to design-stage IP—avoiding GAA or EUV manufacturing—they sidestep current BIS restrictions, though expanded U.S. controls on EDA tools could raise costs. Competitively, NVIDIA and AMD will likely deepen IP integrations within TSMC’s CoWoS ecosystem to preserve bandwidth leadership. Over the next 18 months, such ‘non-U.S. but U.S.-aligned’ design partnerships will dominate AI chip strategies, catalyzing a Southeast Asian IP corridor centered on Malaysia and Vietnam—and accelerating fragmentation in global chiplet standards.