Amazon's Decart talks point to a broader push from custom silicon to world models

Decart's pivot exposes a structural shift the market is underpricing: value in AI infrastructure is migrating from silicon fabrication to silicon orchestration. Technical cascade: With Trainium, TPU, and Gaudi all entering volume production simultaneously, single-chip performance races hit diminishing returns. The bottleneck shifts to the heterogeneous compute orchestration layer—compilers, runtime schedulers, cross-chip data movement protocols. Decart's entry into world models is effectively a bid for the "operating system" position in AI workloads. This directly erodes CUDA's lock-in: when developers decouple from a single architecture, upstream EDA toolchains and HBM interface standards face re-architecting. Compliance & risk: US export controls on advanced nodes tighten further, making Taiwan, China's advanced-process capacity a single-point-of-failure risk. Decart's multi-cloud, multi-chip deployment strategy paradoxically gains supply-chain resilience—but compliance audit complexity scales exponentially, particularly around cross-border data flows and model-weight provenance. Market dynamics: NVIDIA's likely counter is accelerating DGX SuperPOD's heterogeneous scheduling while deepening NIM inference-stack stickiness. Google will productize TPU+GPU hybrid scheduling via Pathways. Intel's Gaudi 3 must prove cross-chip scheduling efficiency by mid-2025 or face marginalization. 12–24 month outlook: "Silicon as commodity, orchestration as moat" becomes industry consensus within 18 months. World models' elastic compute demands—dynamically allocating vision, language, and physics-simulation subtasks at inference—will spawn a new middleware market, potentially exceeding $20B by 2027. Decart, if it first establishes cross-architecture model-to-hardware mapping standards, will wield pricing power no single chip vendor can match.