AMD and Intel align PyTorch CPU optimizations around oneDNN

This is x86's software-layer vertical-integration play against GPU dominance. Converging PyTorch's CPU backend onto oneDNN makes Intel's kernel expertise the de facto public infrastructure for all x86 AI inference — structurally identical to LLVM unifying compiler backends in the 2000s. AMD's independent optimization stack will be progressively absorbed. Technical cascade: PyTorch's inductor compiler targets oneDNN as its primary CPU codegen path, eliminating operator-library fragmentation. Developers gain vendor-agnostic performance without per-vendor tuning. Compliance: EU regulators may scrutinize whether this constitutes a soft standards cartel under Article 101 TFEU, though the more immediate effect is reducing hyperscaler lock-in risk — a net positive for procurement diversity. Strategic counter: NVIDIA's exposure isn't CPU inference per se, but the lowered barrier for CPU-offloaded hybrid workloads. ARM (Apple, Graviton, Qualcomm) will accelerate its own unified runtime to avoid becoming the second-class architecture. 12-24 month trajectory: oneDNN v3 becomes PyTorch 3.0's default CPU backend. Edge x86 inference gains 20-30% throughput. But the structural verdict holds: x86's AI narrative is "sufficient for inference," not "GPU replacement."