America is planning more AI datacenters than its chip supply can fill - The Register

The US AI infrastructure buildout has outpaced the physical ramp of semiconductor manufacturing — a structural fracture, not a cyclical dip. The bottleneck has migrated from lithography to advanced packaging. CoWoS capacity is now the de facto throttle on global AI compute, while HBM stacking yield dictates effective FLOPS per GPU. When chip volume cannot fill rack demand, hyperscalers face a binary: delay deployment or degrade specs. Model iteration cycles become hardware-locked. The CHIPS Act subsidy logic assumed allied capacity could absorb AI expansion. That assumption is breaking. Packaging concentration in Taiwan, China creates a single-point-of-failure exposure under geopolitical stress. Chip premiums cascade downstream, eroding AI application-layer margins. Strategically, NVIDIA will likely offset volume gaps with Blackwell Ultra density; AMD's MI300 captures spillover demand; AWS and Google accelerate in-house ASICs — when off-the-shelf GPUs become unobtainable, vertical integration shifts from option to necessity. 12–24 month outlook: inference workloads in 2026 will hit supply harder than training ever did. A compute "rationing regime" may normalize. Compute is becoming the new oil — the strategic resource defining the next decade of great-power competition.