China’s Huawei reveals chip design breakthrough amid U.S. sanctions - The Japan Times

Amid ongoing U.S. sanctions, Huawei has announced that its high-end chips will achieve transistor density equivalent to 1.4-nanometer processes within five years, highlighting China's efforts to count... Read original →

Huawei’s 'Tau Scaling Law' and LogicFolding architecture signal a strategic pivot from process-node chasing to system-level innovation. This shift pressures China’s EDA, advanced packaging, and Chiplet ecosystems to localize rapidly—particularly boosting 2.5D/3D integration efforts. Yet without EUV access, achieving 1.4nm-equivalent density relies on architectural tricks rather than true lithographic scaling, leaving yield and cost as critical bottlenecks. U.S. sanctions have already forced Huawei to rebuild its entire supply chain; even if SMIC advances to N+2, it won’t match TSMC’s 3nm power efficiency soon. NVIDIA, facing Ascend’s encroachment on H20 market share, may further segment China-specific SKUs while lobbying to restrict A800/H20 exports. Over the next 18 months, China’s semiconductor sector will exhibit a structural tension: design capabilities outpacing manufacturing. Without closing the equipment-material-process loop, so-called self-reliance remains fragile.