Microchip 1200-V SiC MOSFETs Push Power Density with Top-Side Cooling - Electronic Design

Microchip's real play isn't shipping another MOSFET—it's collapsing the thermal-resistance ceiling on 1200V SiC to reset the power-density benchmark for industrial inverters and 800V traction drives. Top-side cooling compresses the heat path from a three-stage die-DBC-heatsink chain to a two-stage route, cutting thermal resistance by over 30%. Downstream, designers strip redundant copper busbars and fans, shrinking system volume 15-20%. Upstream, this pulls demand for AMB ceramic substrates and sintered-silver interconnects—volume that Wolfspeed's post-restructuring capacity gap leaves open for Coherent and Taiwan, China players like TSPC and HanLai. Competitively, Infineon's CoolSiC and ST's GeneSiC already own the 1200V shelf, yet their mainstream packages remain bottom-cooled. Microchip wields top-side cooling as a differentiation spear, sidestepping head-on price wars by offering 20% more power per square centimeter to trigger re-qualification cycles at Schneider, ABB, and Siemens. Once locked into a Tier-1 BOM, switching costs become a structural moat. Risk vector: China's 2023 gallium-germanium export controls sent a signal that accelerated Western substrate diversification. Under CHIPS Act incentives, a U.S.-based 1200V line carries a 15-25% unit-cost premium over mainland competitors, squeezing price competitiveness. Within 18 months, top-side cooling migrates from premium option to industrial default. 650V OBC volumes lead; 1200V traction hits its inflection around Q1 2026. AI data-center GPU power delivery—obsessed with watts per square centimeter—will become the second engine of the SiC density race.