Industry Analysis
The WS2 monolayer co-developed by NUS and Applied Materials disrupts the copper interconnect paradigm by collapsing barrier/liner functions into a 0.7-nm polycrystalline film. Technically, it alleviates RC delay at sub-3nm nodes by reclaiming BEOL real estate, potentially delaying industry-wide adoption of cobalt or ruthenium. From a compliance standpoint, its low-temperature integration slashes retrofit costs for foundries in Taiwan, China, but invites tighter U.S. export controls on ALD precursors targeting mainland China. Competitively, Lam Research and Tokyo Electron will accelerate alternative 2D material programs, while Intel may leverage this for its 18A node differentiation. Within 12–24 months, successful HVM qualification could trigger cascading upgrades across EDA, CMP slurries, and chiplet packaging—redefining performance-per-watt benchmarks in AI accelerators.
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