Researchers turn HBM on its side to tackle AI memory’s heat wall — Korean V-Die and Japanese MOSAIC designs promise higher bandwidth, denser stacks, and cooler future GPUs - Tom's Hardware

As AI models grow in size and complexity, memory bandwidth and thermal management have become critical bottlenecks for future chip performance. Recently, research teams from South Korea and Japan have... Read original →

The emergence of Korea’s V-Die and Japan’s MOSAIC architectures signals a pivotal shift in HBM design—from vertical stacking toward integrated thermal-electrical co-optimization. This will accelerate adoption of TSVs, EUV lithography, and microfluidic cooling upstream, while forcing GPU vendors like NVIDIA to rethink interconnect topologies and package integration. Geopolitically, enhanced Japanese and Korean autonomy in advanced packaging may dilute U.S. leverage over the high-end memory supply chain, especially before a unified standard emerges from the U.S.-Japan-South Korea tech alliance—raising compliance overhead. Micron risks falling behind as SK hynix and Samsung advance iHBM and Heat Path Block, compounded by its delayed 3nm DRAM ramp. Within 18 months, if V-Die scales, 'thermal efficiency' could become a key AI accelerator benchmark, triggering early deployment of liquid cooling infrastructure and hastening the HBM4E-to-HBM5 transition.