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Samsung Could Make Part of Google Icefish TPU as Hyperscalers Hedge Against TSMC - Tech Times

www.techtimes.com 2026-06-15 Tech Times
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AI chipTPUGoogleSamsungTSMCSemiconductor manufacturingChip designChip packagingHBM memoryArtificial intelligenceSupply chain riskChiplet architecture2nm process1.4nm processCompute chipI/O dieHyperscalerSemiconductor supply chainChip fabricationTechnology collaboration
News Summary
Google is reportedly considering having Samsung manufacture part of its next-generation AI chip, codenamed 'Icefish,' as a strategic move to reduce reliance on TSMC amid capacity constraints. Under th... Read original →
Industry Analysis
Google’s decision to split its Icefish TPU into heterogeneous chiplets—assigning the 1.4nm compute die to TSMC (Taiwan, China) and the 2nm I/O die to Samsung—is not merely about capacity hedging but signals a structural shift in AI silicon design. Technically, this accelerates adoption of advanced packaging standards like UCIe and tight co-optimization with HBM4E/LP40 memory stacks. Geopolitically, tightening U.S. export controls compel hyperscalers to diversify beyond single-source foundries, though Samsung’s yield instability introduces hidden cost risks. Competitively, NVIDIA and Tesla may follow suit, marginalizing second-tier players like MediaTek in AI inference. Within 18 months, if Samsung achieves >85% yield at 2nm, it could emerge as a credible second source for AI training chips, disrupting the foundry duopoly.
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