Securing Chiplet-Based Platforms: Distributed Trust With Centralized Authority - Semiconductor Engineering

This article explores a new paradigm for building secure architectures in chiplet-based platforms. As semiconductor design evolves from monolithic System-on-Chips (SoCs) to modular chiplet architectur... Read original →

The shift toward distributed trust in chiplet architectures fundamentally relocates the root of trust from monolithic dies to a federated verification model. This forces EDA vendors to embed hardware-rooted identity primitives and shifts security validation responsibilities onto advanced packaging partners, raising compliance costs across the design-manufacturing-test chain. Geopolitical pressures—via the U.S. CHIPS Act and EU Cyber Resilience Act—will accelerate standardization, sidelining smaller IP firms lacking trusted-root integration. NVIDIA and AMD are leveraging UCIe to control interface security protocols, while Intel may counter with vertically integrated IDM-based solutions. Within 18 months, chiplet platforms lacking ISO/SAE 21434 or Common Criteria certification will face hard barriers in automotive and AI server markets—making security the gatekeeper of commercialization, not an afterthought.