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Siemens and Samsung Foundry expand collaboration on advanced semiconductor design - New Electronics

www.newelectronics.co.uk 2026-06-01 New Electronics
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Semiconductor DesignEDA ToolsAdvanced ProcessChip ManufacturingFoundry CollaborationDesign ComplexityPhotonic Integrated CircuitDesign VerificationPower IntegrityDesign for Test2nm Process3D Integrated Packaging
News Summary
Siemens Digital Industries Software and Samsung Foundry have expanded their collaboration to support advanced semiconductor design and manufacturing. The partnership focuses on aligning Siemens' elect... Read original →
Industry Analysis
Siemens and Samsung Foundry’s expanded alliance is a strategic hedge against the disintegration of design-manufacturing alignment at 3nm/2nm nodes. Technically, full qualification of Calibre and Innovator3D slashes lithography verification cycles, but Solido’s PVT corner modeling breakthrough is more critical—it stabilizes analog yield volatility in advanced nodes, directly challenging Synopsys’ PrimeSim dominance. Geopolitically, tightening U.S.-EU EDA export controls push Samsung to diversify away from American tools; Siemens, as a German entity, offers a compliance-safe corridor. TSMC (Taiwan, China) remains reluctant to grant non-U.S. EDA vendors deep PDK access, while Intel IFS may double down on Cadence to fortify its foundry moat. Within 18 months, this partnership will accelerate adoption of photonic integrated circuits and chiplet-based heterogeneous integration, forcing EDA firms to evolve from tool providers into manufacturing co-engineers—leaving smaller chip designers without ecosystem access stranded before the 2nm era.
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