Tensordyne Tapes Out LNS-Based AI Chip, Claims Huge Power Advantages

AI chip startup Tensordyne has unveiled its data center inference chip, claiming an order-of-magnitude improvement in power efficiency over leading GPU alternatives. Built on TSMC's 3nm process, the c... Read original →

Tensordyne’s logarithmic number system (LNS) fundamentally disrupts the FP8/INT8 hardware paradigm, forcing EDA tools, compilers, and quantization frameworks to overhaul support for nonlinear numeric representations—triggering a software stack cascade. Reliance on TSMC’s 3nm EUV process exposes supply chain vulnerability under tightening U.S. export controls on advanced nodes; absence of a second-source strategy risks production delays. NVIDIA will likely accelerate Blackwell Ultra iterations and loosen NVLink bandwidth restrictions to retain hyperscaler lock-in. HPE and Juniper may fast-track integration into liquid-cooled racks. If volume shipments materialize by Q2 2027, data centers will shift procurement criteria from raw compute density to watts-per-token efficiency, eroding GPU pricing power and cementing MoE+LNS as the new inference architecture baseline within 18 months.