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The rapid advancement of artificial intelligence is profoundly reshaping chip design workflows in the semiconductor industry. The 2026 ESD Alliance panel discussion revealed transformative insights into AI's revolutionary role in chip design processes. Traditional design methodologies face significa

Cadence and Samsung Foundry are advancing the 2nm AI chip ecosystem through agent-based design flows and expanded IP portfolios, marking a significant step in semiconductor industry's AI chip development. This collaboration demonstrates the industry's shift toward more sophisticated manufacturing pr

Cadence and Samsung Foundry have deepened their collaboration to focus on 2nm chip design for AI-intensive workloads, enhancing the entire design-to-manufacturing pipeline. The partnership expands Cadence's Memory and Interface IP portfolio on Samsung's second-generation 2nm process, including suppo

Cadence and Samsung Foundry have expanded their collaboration to support second-generation 2nm process design with enhanced memory and interface IP, including SerDes, PCIe, UCIe, and NVLink-C2C. This move builds on their 2025 certification of Cadence tools across multiple Samsung nodes and aims to a