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A new technical paper, “AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving,” was published by researchers at UC San Diego, Columbia University, Yonsei University, NVIDIA, and Samsung.Abstract“All current LLM serving systems place the GPU at the center, from production-level attention-FFN disaggregation to NVIDIA’s Rubin GPU-LPU heterogeneous platform. Ev

Bhavish Aggarwal-led Krutrim pivots from building AI models, chip design to cloud services - Moneycontrol.com

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news.google.com 2026-05-04 Moneycontrol.com

TSMC's A16 process node will be ready for mass production later this year - PhoneArena

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www.phonearena.com 2026-05-04 PhoneArena

Sub-1nm Process Technology Won’t Arrive Till 2034, Logic Roadmap Highlights 2D FETs For 0.2nm & Sub 0.2nm Nodes By 2043-2046 - Wccftech

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wccftech.com 2026-05-03 Wccftech

TSMC’s A16 ‘1.6nm’ Node Promises 10% Speed Boost or 20% Power Cut Over 2nm, With Backside Power Hitting Production by Q4 2026 - Wccftech

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wccftech.com 2026-05-02 Wccftech

Timestamp Drift and Sensor Synchronization: Small Timing Errors, Big Safety Consequences

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eetimes.com 2026-04-30 Nitish Sanghi

Minor timing errors can make an autonomous system act on a world model that is already out of date.

Autonomous Systems Timing Synchronization Sensor Fusion System Integration Safety Mechanisms Timing Errors Localization Accuracy Motion Compensation

What the DRAM Crunch Teaches Us About System Design

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eetimes.com 2026-04-28 Avi Baum

Redesign your AI systems for efficiency—escape the DRAM crunch by embracing smaller, smarter models.

DRAM shortage AI system design memory constraints high-bandwidth memory edge computing AI infrastructure system architecture supply chain risk

SUSE Launches Industrial Edge Platform Following Losant Acquisition

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eetimes.com 2026-04-27 Yashasvini Razdan

Keith Basil, edge strategy and product leader at SUSE, outlines how the Losant acquisition shapes SUSE Industrial Edge and its deployment model.

Industrial IoT Edge Computing Cloud-Native SUSE Losant Industrial Edge Platform OPC UA MQTT

Can Edge AI Keep Up?

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semiengineering.com 2026-04-23 Ann Mutschler

As models evolve faster than silicon cycles, experts weigh how much adaptability archit...

Edge AI AI chips Heterogeneous architecture Model updates Computing power Hardware adaptation Software toolchain AI processors

Which Chips Actually Matter? Europe Reassesses Its Semiconductor Strategy After Nexperia Wakeup Call

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eetimes.com 2026-04-09 Pat Brans

As the Nexperia episode sharpens Europe’s focus, experts say resilience will hinge on application relevance, supply chain depth, and smarter investment priorities.

Semiconductor Strategy European Chip Policy Nexperia Incident Chip Value Chain Advanced Node Mature Node Automotive Chips Power Devices

Hiwin and Qualcomm bring edge AI to PLP equipment with Load Port tie-up at Computex

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digitimes.com

Hiwin Technologies and Qualcomm Inc. announced a partnership at Computex 2026 to integrate Qualcomm Dragonwing Q6 series processors into Hiwin's Load Port products, delivering edge AI capabilities for semiconductor panel-level packaging (PLP) equipment. The collaboration positions Hiwin's Load Port as the smart edge node in front-end modules, aiming to improve real-time image processing, status se

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