Semiconductor News & Analysis Feed
49 articles
2026-05-27
digitimes.com
2026-05-27
Transcend announced it will exhibit enterprise solid-state drives, DDR5 7200 memory, and embedded camera modules at COMPUTEX 2026 in the Storage and Management Solutions area, saying the showcase will demonstrate integrated capabilities in AI computing storage, high-speed transmission, and reliable data processing. The firm highlighted that as AI expands to endpoint applications, performance and s
2026-05-27
digitimes.com
2026-05-27
Samsung Electronics' 2026 tentative labor-management agreement is expected to pass after already surpassing an 86% voting participation rate within just three days. While the agreement has temporarily eased concerns over potential strikes, South Korea's semiconductor industry is increasingly worried that the newly expanded performance bonus structure, which guarantees employees a fixed percentage
2026-05-27
developer.nvidia.com
2026-05-27
NVIDIA Developer
NVIDIA CompileIQ tackles one of the hardest problems in performance engineering: finding the compiler options that unlock the best performance for a specific workload.
Consider a team that has spent weeks optimizing an LLM inference pipeline on GPUs, tuning batch sizes, quantizing to FP8, adopting flash attention, fusing every kernel they can. The profiler says there’s nothing left to squeeze.
B
2026-05-27
developer.nvidia.com
2026-05-27
NVIDIA Developer
Developers can now use NVIDIA CUDA Tile programming within large existing C++ GPU codebases to develop highly optimized GPU kernels using tile-based abstractions.
NVIDIA CUDA Tile, launched with NVIDIA CUDA 13.1, introduced tile-based programming for GPUs. Designed with a top-level language layer and another intermediate layer that any high-level programming language can target, CUDA Tile autom
2026-05-27
aws.amazon.com
2026-05-27
Amazon Web Services (AWS)
Build high-performance generative AI systems with Strands Agents, NVIDIA NIM, and Amazon Bedrock AgentCore
by Kanishk Mahajan and Akshay Parkhi on 26 MAY 2026 in Amazon Bedrock Agents, Best Practices, Strands Agents, Technical How-to, Thought Leadership Permalink Comments Share
Building high-performance generative AI agents requires architecture that can deliver fast inference, coordinate multi
2026-05-26
www.phoronix.com
2026-05-26
Phoronix
NVIDIA Vera CPU Benchmarks: Olympus Cores Delivering The Best Performance Ever Seen On ARM
Written by Michael Larabel in Processors on 26 May 2026 at 10:00 AM EDT. Page 1 of 11. Add A Comment.
NVIDIA's Vera data center CPU isn't ramping up until later this year but I recently had the opportunity to try out this new ARM-based CPU designed for agentic AI workloads. NVIDIA's Vera CPU with its in-hou
2026-05-26
eetimes.com
2026-05-26
Huawei's answer to Moore's Law without EUV promises 14A performance by 2031.
2026-05-26
www.benzinga.com
2026-05-26
Benzinga
__fail__
2026-05-26
www.cnbc.com
2026-05-26
CNBC
__fail__
2026-05-26
technode.global
2026-05-26
TNGlobal
SK hynix unveils ‘iHBM’ thermal solution to boost AI performance
MAY 26, 2026|BY LIUTENG
Enhances heat dissipation by integrating ICEs into the HBM package
Reduces thermal resistance by 30%, ensuring stable chip operation in demanding high-temperature and high-pressure environments
Lowers barriers to adoption by leveraging market-proven MR–MUF technology, featuring high design compatibility
SEOUL
2026-05-26
www.techpowerup.com
2026-05-26
TechPowerUp
Request failed (HTTP 400)
This should only take a few seconds. If you have issues, please do contact us, we want to learn about any problems.
Need help? Contact Us. Please mention your IP: 199.91.67.165
2026-05-26
digitimes.com
2026-05-26
When Huawei unveiled its "Tau (τ) Scaling Law" at ISCAS 2026 in Shanghai, the announcement signalled more than another chip architecture update. It marked China's most ambitious attempt yet to redefine how semiconductor performance is measured in the post-Moore era.
2026-05-26
digitimes.com
2026-05-26
Powerchip announced it will present a "3D AI Foundry" showcase at COMPUTEX 2026 to demonstrate 3D wafer-on-wafer (WoW) DRAM stacking, interposers, and Si-cap integrated passive devices as part of an end-to-end offering for AI chips, addressing rising demand for GenAI and high-performance computing for memory capacity, bandwidth, and energy efficiency. The firm said it is leveraging its combined lo
2026-05-26
digitimes.com
2026-05-26
Ennostar Holdings' transformation has begun to show clear results, with chairman Paul Peng saying the company's "3+1" strategy is taking shape, as higher-value applications now account for more than half of revenue. Despite continued uncertainty in the global environment, Peng remains cautiously optimistic about the second half of 2026 and expects the company to maintain relatively strong performa
2026-05-26
sg.finance.yahoo.com
2026-05-26
Yahoo Finance Singapore
__fail__
2026-05-26
www.prnewswire.com
2026-05-26
PR Newswire
SK hynix unveils 'iHBM' thermal solution to boost AI performance
NEWS PROVIDED BY
SK hynix Inc.
May 25, 2026, 19:39 ET
SHARE THIS ARTICLE
Enhances heat dissipation by integrating ICEs into the HBM package
Reduces thermal resistance by 30%, ensuring stable chip operation in demanding high-temperature and high-pressure environments
Lowers barriers to adoption by leveraging market-proven MR–
2026-05-26
markets.ft.com
2026-05-26
Financial Times
SEOUL, South Korea , May 25, 2026 /PRNewswire/ -- SK hynix Inc. (or "the company", www.skhynix.com) announced today the launch of the iHBM solution that embeds integrated cooling elements(ICEs)[1] within the high-bandwidth memory(HBM) package for next-generation HBM products.
[1] ICE(Integrated Cooling Elements): A cooling element made of electrically non-conductive, thermally conductive silicon-
2026-05-25
www.digitimes.com
2026-05-25
digitimes
HiSilicon president and Huawei Technologies director He Tingbo. Credit: Xinhua
As the global semiconductor industry confronts the limits of Moore's Law, Huawei has unveiled a new roadmap aimed at extending chip performance growth through architecture, interconnect, and system-level optimisation rather than pure transistor...
Some subscribers prefer to save their log-in information
2026-05-25
news.futunn.com
2026-05-25
富途牛牛
① The Tao (τ) Law proposes replacing “geometric scaling” with “time (τ) scaling” as the new guiding principle for the evolution of semiconductors and electronic systems. ② Based on the Tao (τ) Law, Huawei has already designed and mass-produced 381 chip models. The Kirin chip, set to debut in the fall of 2026, will be the first to adopt Logic Folding technology.
According to a report by The Scienc
2026-05-25
www.huawei.com
2026-05-25
Huawei
__fail__