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Samsung Electronics has demonstrated a 3D stacked transistor structure with a 42-nanometer gate pitch, a research milestone that extends vertical integration, long used in memory chips, into logic semiconductors.

This is a paid press release. Contact the press release distributor directly with any inquiries. Applied Materials Unveils Deposition and Selective Etch Systems to Advance 3D Chip Scaling Applied Materials, Inc. Mon, June 15, 2026 at 1:05 PM PDT 5 min read AMAT -3.00% Trade AMAT on Coinbase Trading disclosure Applied Materials, Inc. New systems enable precision materials engineering in high-aspec

New systems enable precision materials engineering in high-aspect-ratio 3D logic and memory chip structures Centris™ Spectral™ SiN ALD leverages innovative microwave plasma technology to deliver uniform silicon nitride deposition in challenging 3D structures Producer™ Selectra™ Mo Etch selectively removes molybdenum for wordline separation to enable 3D NAND scaling The new systems are being used b

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