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2026-09-01
Research Bits: Sep. 1 - Semiconductor Engineering
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news.google.com 2026-09-01
2026-08-31
Photonics Forces A Chiplet Rethink - Semiconductor Engineering
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semiengineering.com 2026-08-31
2026-08-30
Molecular Dynamics Study Explains Aluminum Dopant Activation In 4H-SiC (TU Wien, Silvaco) - Semiconductor Engineering
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semiengineering.com 2026-08-30
Researchers from TU Wien and Silvaco Europe have published a molecular dynamics study exploring the activation mechanism of aluminum doping in 4H-SiC. The study investigates how implantation temperature and dose influence defect formation and dopant activation during early-stage annealing. Using an
semiconductor materials4H-SiCaluminum dopingmolecular dynamicsdopant activationion implantationdefect formationprocess optimization
2026-08-30
Intrinsic Polarization Superjunctions Boost GaN-On-Silicon Power Devices (EPFL) - Semiconductor Engineering
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semiengineering.com 2026-08-30
Researchers from École Polytechnique Fédérale de Lausanne (EPFL) have published a technical paper in Nature Electronics titled 'Intrinsic Polarization Superjunctions in III-Nitride Heterostructures for Efficient Power Electronics.' The study addresses key limitations in gallium nitride (GaN)-based p
Gallium nitridePower devicesSilicon substrateIII-nitrideSuperjunctionPolarization effectPower electronicsSemiconductor materials
2026-08-28
Chip Industry Week in Review - Semiconductor Engineering
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semiengineering.com 2026-08-28
2026-08-24
Multi-Die Assemblies Dominate At 2nm And Below - Semiconductor Engineering
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semiengineering.com 2026-08-24
2026-08-20
From Research To Production: Collaboration Is Key For Semiconductor Innovation - Semiconductor Engineering
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semiengineering.com 2026-08-20
2026-08-20
How Will The Custom HBM Business Work? - Semiconductor Engineering
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news.google.com 2026-08-20
2026-08-18
Semiconductor Earnings Roundup: Revenue, Growth and Takeaways - Semiconductor Engineering
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semiengineering.com 2026-08-18
2026-08-18
Controlling Voltage Droop In 2.5D PIM Chiplet Architectures (Washington St., UW-Madison) - Semiconductor Engineering
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semiengineering.com 2026-08-18
2026-08-17
Precision Under Pressure: Rethinking Bond Reliability In High-Density Semiconductor Test - Semiconductor Engineering
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semiengineering.com 2026-08-17
2026-08-11
HBM Becomes Testbed For 3D Assembly Yield - Semiconductor Engineering
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semiengineering.com 2026-08-11
High-bandwidth memory (HBM) is emerging as a critical testbed for 3D assembly testing and yield optimization. As data centers increasingly rely on high-performance computing for AI and graphics workloads, HBM's vertical stacking architecture delivers unmatched bandwidth through tightly coupled DRAMs
High-bandwidth memory3D stackingDesign for testReliabilityWafer testingSilicon interposerMicrobumpsInterconnect technology
2026-08-11
Optimizing Chiplet Placement And Interposer Footprint For 2.5D Systems (A*STAR) - Semiconductor Engineering
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news.google.com 2026-08-11
2026-08-11
Femtosecond Laser Process Targets Depth-Controlled 4H-SiC Wafer Slicing (Texas A&M, KIMM, UST) - Semiconductor Engineering
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news.google.com 2026-08-11
2026-08-08
Ultrafast X-Ray Diffraction Maps Thermal Transport In GaN Thin Films (MIT, SLAC, Stanford, Argonne) - Semiconductor Engineering
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news.google.com 2026-08-08
2026-08-08
Rapid Switching of Optical Properties in a Doped Semiconductor By Femtosecond Laser Pulses (Imperial College London, U. of Exeter) - Semiconductor Engineering
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news.google.com 2026-08-08
2026-07-31
AI Is Needed To Make Semiconductor Engineering Work More Productive - Forbes
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www.forbes.com 2026-07-31
As artificial intelligence (AI) continues to permeate the semiconductor industry, a profound transformation is underway. This article explores how leading semiconductor companies are leveraging AI to enhance design and manufacturing efficiency. LAM Research's 'Semiverse' platform drives process impr
Artificial IntelligenceSemiconductor DesignManufacturing ProcessEDA ToolsAI AutomationDigital TwinChip VerificationAI Engineering
2026-07-29
Flat Enough? Warpage Management Gets Harder In Advanced Packaging - Semiconductor Engineering
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semiengineering.com 2026-07-29
As semiconductor packaging advances toward smaller nodes and higher integration levels, packages are becoming larger and thinner, exacerbating warpage issues that were previously treated as simple flatness concerns. Today, warpage manifests as complex local shape signatures affecting bonding, alignm
Advanced PackagingWarpage ManagementSemiconductor PackagingMaterial ScienceProcess ControlSurface MetrologyCoefficient of Thermal ExpansionWafer-Level Packaging
2026-07-27
Preparing For AI-Driven Chip Design And Verification - Semiconductor Engineering
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news.google.com 2026-07-27
2026-07-27
Why the Semiconductor Industry Needs A Common Language For Functional Safety - Semiconductor Engineering
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news.google.com 2026-07-27