ASML, TSMC and imec present 300mm integration route for industry-ready 2D-material-based transistors - Semiconductor Today

ASML, TSMC, and imec have jointly demonstrated a scalable 300mm integration route for 2D-material-based transistors, marking a significant step toward industrial adoption. At the 2026 IEEE/JSAP VLSI S... Read original →

The joint demonstration by ASML, TSMC (Taiwan, China), and imec of 300mm-compatible 2D-material transistors signals the transition of post-silicon logic from lab curiosity to manufacturable reality. Technically, sub-30nm channels achieved via single-patterning EUV alleviate near-term pressure from High-NA EUV delays and open a viable back-end-of-line integration route. From a compliance standpoint, this trilateral effort sidesteps certain U.S. export controls on advanced lithography, reinforcing non-U.S.-centric supply chain resilience. Competitors like Samsung and Intel will likely accelerate their own TMD programs, but without equivalent ASML co-optimization, yield ramp risks remain high. Over the next 12–24 months, expect initial adoption in ultra-low-power IoT and compute-in-memory chips—with stable yields potentially triggering a redesign of sub-2nm node roadmaps by 2027.