dorsaVi Finalises RRAM-CMOS Validation Chip Design for Ultra-Edge AI - smallcaps.com.au

dorsaVi has completed the design of its first integrated resistive random access memory-complementary metal-oxide semiconductor (RRAM-CMOS) validation chip, marking a significant step forward in its u... Read original →

dorsaVi’s RRAM-CMOS validation chip, co-developed with NTU Singapore and ITRI Taiwan, signals Compute-in-Memory’s transition from academic prototype to manufacturable edge AI. Integrating RRAM in BEOL sidesteps embedded NVM compatibility issues at sub-3nm nodes, forcing EDA and test ecosystems to adapt. While TSMC fabrication ensures process access, geopolitical friction may inflate supply chain redundancy costs amid U.S.-EU reshoring pushes. Competitors like NVIDIA and Intel will likely accelerate neuromorphic or CIM roadmaps to defend edge inference turf. If energy-efficiency gains materialize in robotics and industrial AI within 18 months, RRAM could pivot from niche to mainstream, resetting cost-performance expectations for ultra-edge silicon.