GlobalFoundries’ Silicon Photonics Ambitions: Can Glass Waveguides Challenge TSMC’s COUPE in the Next Era of AI Infrastructure? - semivision

Silicon photonics is pivoting from feasibility to standard-setting. GlobalFoundries' glass waveguide strategy is fundamentally a yield-and-scale play on 300mm mature nodes, engineered to sidestep TSMC's (Taiwan, China) advanced-packaging moat. Downstream, the low-insertion-loss physics of glass waveguides directly erode the pricing power of pluggable transceiver vendors like Innolight and Coherent — in the CPO era, integration depth between optical engines and switch silicon dictates who captures the value chain. On compliance, GF's US-domestic foundry status carries structural advantage under CHIPS Act subsidies and tightening export controls, making it the zero-friction choice for North American hyperscalers. TSMC's COUPE is more aggressive on photonic-logic co-integration, but geopolitical risk premium is now a quantified line item in customer TCO models. Strategic read: TSMC will almost certainly bundle COUPE with CoWoS as a single SKU, selling "logic + photonics" to lock in NVIDIA and AMD's next-gen AI platforms. GF must secure at least two hyperscaler design-ins before the 2026 CPO mass-production window closes. Over the next 12–24 months, the real inflection is not who ships a demo first — it is who first closes the interconnect protocol stack between glass waveguides, HBM, and advanced packaging. That is the "TCP/IP moment" for AI infrastructure.