How ON’s New Elite Pairing Studio For SiC Design Workflows Has Changed Its Investment Story - simplywall.st

In early June 2026, ON Semiconductor launched its cloud-based Elite Pairing Studio, a tool designed to help engineers more efficiently match silicon carbide (SiC) MOSFETs with gate drivers for high-po... Read original →

ON Semiconductor’s Elite Pairing Studio isn’t just a design tool—it’s a strategic move to control the SiC ecosystem. By standardizing MOSFET-to-gate-driver co-optimization, it locks customers into ON’s technical stack early in the design cycle, creating EDA-like vendor lock-in. This pressures upstream wafer suppliers to align with ON’s simulation parameters and erodes customization advantages held by rivals like Wolfspeed and Infineon. Geopolitically, while U.S. CHIPS Act mandates for domestic wide-bandgap production raise compliance costs, ON’s cloud-based approach lowers customer switching barriers, enhancing supply chain resilience. Over the next 12–24 months, as NIO and Geely roll out 800V EV platforms and AI data centers demand ultra-efficient power delivery, this tool will accelerate SiC adoption from ~15% to over 30%, fundamentally reshaping power semiconductor competition.