India should build capabilities in design & advanced packaging: NITI Aayog - Deccan Herald

NITI Aayog's report 'Future of India’s Semiconductor Industry' highlights that semiconductors are evolving from standalone components into integrated systems underpinning the digital economy, presenti... Read original →

India’s strategic pivot toward chip design and advanced packaging—bypassing capital-intensive wafer fabs—leverages its software talent while sidestepping manufacturing bottlenecks. This move will accelerate adoption of 3D stacking, chiplets, and 2.5D integration, spurring demand for EDA tools, thermal solutions, and heterogeneous test infrastructure. Yet without domestic capabilities in lithography or deposition equipment, India remains vulnerable to U.S., Japanese, and Dutch export controls, inflating compliance costs. TSMC and Samsung will likely fast-track backend packaging investments in India to capture policy incentives, while firms from Taiwan, China and South Korea may dominate via IP licensing in design ecosystems. Over the next 18 months, success hinges not on fab announcements but on building a yield-engineering workforce and cleanroom technician pipeline. The real long-tail impact lies in whether India can establish novel SiP standards tailored for AI accelerators—not just assemble foreign chips.