TSMC Bets on Glass for CoWoS as Silicon-Mimicking Thermals Beat Organic Substrates, Yet Mass Production Stays Distant - Wccftech

Taiwan Semiconductor Manufacturing Company (TSMC) is expanding its glass substrate supply chain as the first step in establishing a supply chain for chip-on-panel-on-substrate (CoPoS) packaging techno... Read original →

TSMC’s pivot to glass substrates isn’t just a material swap—it’s a strategic recalibration of thermal and interconnect fundamentals in advanced packaging. By aligning CTE with silicon, glass mitigates thermo-mechanical stress in 3D-stacked dies, compelling upstream players like Corning and Nippon Electric Glass to fast-track ultra-low-CTE formulations. This deepens Taiwan, China’s reliance on U.S.-Japan equipment and materials, heightening supply chain vulnerability under export controls. Competitors like Samsung and Intel, betting on silicon interposers or hybrid bonding, may accelerate alternative integration paths to avoid dependency. Within 18 months, if yields stay below 70%, glass will remain confined to niche HPC; if surpassed, it could catalyze an industry-wide shift from organic to inorganic substrates—redefining the economics of chiplet-based scaling.