Semiconductor News & Analysis Feed

Japanese chipmaker Rapidus plans to challenge TSMC by offering lower wafer pricing, with its 2nm-class silicon priced around $20,000 per wafer upon launch in 2027. While this pricing strategy appears risky, given Rapidus’s current stage in developing leading-edge technologies, TSMC is expected to ha

Japanese chipmaker Rapidus plans to launch its 2nm fabrication process in 2027, offering wafer pricing significantly below that of TSMC. With quotes ranging from ¥3 million to ¥3.5 million per wafer (approximately $20,000), Rapidus aims to undercut TSMC's rumored $30,000 pricing for N2 wafers. While

As AI chips continue to scale in size and complexity, demand for next-generation packaging solutions is rising, with glass substrates emerging as a key technology. According to reports, glass substrates are expected to enter early commercialization by 2027, ramp up production by 2029, and reach full