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ESWIN Technology's bookbuilding for a Hong Kong IPO marks a notable milestone in the RISC-V ecosystem's commercialization trajectory. As the first RISC-V open-source chip designer to list on the HKEX, the company's offering of 1.57 billion H shares at HK$1.48–1.59 per share, raising up to HK$2.5 bil

ESWIN Computing's recent investor engagement in Hong Kong underscores a pivotal shift in the global semiconductor IP landscape. As a leading Chinese chip design service and IP licensing firm, ESWIN is positioning its RISC-V portfolio as a core growth engine, targeting investors increasingly drawn to

The Linux 7.2 kernel development cycle introduced significant enhancements for the RISC-V architecture, including optimizations to reduce kernel startup overhead and default support for Eswin SoCs, particularly targeting the SiFive HiFive Premier P550 board. By enabling HAVE_BUILDTIME_MCOUNT_SORT, t

With the upcoming Linux 7.2 kernel release, a significant update is set to enable default support for ESWIN SoC in RISC-V kernel builds. Proposed by Anirudh Srinivasan from Tenstorrent, this change adds CONFIG_ARCH_ESWIN=y to the RISC-V default configuration (defconfig), allowing kernels to boot on