SemiPulse | AI-Powered Semiconductor Supply Chain Intelligence & Market Signals

QSOE 0.1 Debuts as a QNX-Inspired Open-Source OS for RISC-V - Linuxiac

0.85

linuxiac.com 2026-06-25 Linuxiac

HOME LINUX & OPEN SOURCE NEWS QSOE 0.1 DEBUTS AS A QNX-INSPIRED OPEN-SOURCE OS FOR RISC-V QSOE 0.1 Debuts as a QNX-Inspired Open-Source OS for RISC-V The first QSOE release delivers a QNX-inspired open-source OS with shared userspace across two microkernel variants for 64-bit RISC-V hardware. ByBobby BorisovOnJune 25, 2026 QSOE 0.1 has been released as the first public version of a new QNX-insp

RISC-V open-source OS microkernel QNX embedded systems operating system development SiFive seL4

Sovereign European chips could become a RISC-V-based reality - Techzine Global

0.87

www.techzine.eu 2026-06-25 Techzine Global

3 MIN DEVICES Sovereign European chips could become a RISC-V-based reality SUSE and Openchip Join Forces ERIK VAN KLINKEN Jun 25, 2026, 11:00 PM GMT+8 A sovereign IT infrastructure is open to interpretation. Only the American hyperscalers consider data residency sufficient to call an IT stack sovereign. Rarely, however, is the physical hardware discussed: how autonomous are you if your chips come

European sovereignty RISC-V Chip autonomy Open source hardware SUSE OpenChip AI accelerators EU compliance

SUSE and Openchip Partner to Develop Sovereign European RISC-V Hardware and Open Source Software Stack - HPCwire

0.85

www.hpcwire.com 2026-06-25 HPCwire

www.hpcwire.com Performing security verification This website uses a security service to protect against malicious bots. This page is displayed while the website verifies you are not a bot. Ray ID: a11698ccb863387a Performance and Security by Cloudflare Privacy

RISC-V Open Source Software Semiconductor European Technology Chip Design Cloud Computing Security Verification Hardware Development

Qualcomm Bets $14 Billion on Cracking Nvidia's AI Monopoly With RISC-V and an Open Compiler - Tech Times

0.92

www.techtimes.com 2026-06-25 Tech Times

By Jerry Owens Published: Jun 24 2026, 13:22 PM EDT Share on Facebook Share on Twitter Share on LinkedIn Share on Reddit Share on Flipboard Share on Pocket logo of US Semiconductor company Qualcomm in the Alpine resort of Davos during the World Economic Forum (WEF) annual meeting. The World Economic Forum takes place in Davos from January 19 to January 23, 2026. INA FASSBENDER/GETTY IMAGES Qualc

Qualcomm NVIDIA RISC-V AI chips Open source software Cloud computing Artificial intelligence Semiconductor

QSOE v0.1 Released As A QNX-Inspired RISC-V OS - Phoronix

0.85

www.phoronix.com 2026-06-24 Phoronix

QSOE v0.1 Released As A QNX-Inspired RISC-V OS Written by Michael Larabel in Operating Systems on 24 June 2026 at 06:05 AM EDT. 3 Comments QSOE 0.1 has made its debut as a QNX-inspired, dual kernel architecture open-source operating system just targeting RISC-V. QSOE ships with the same user-space and two kernel opttions: QSOE/N that is using the Skimmer micro-kernel that was written from scratch

Operating System RISC-V Open Source Microkernel QNX Embedded Systems Real-time OS Software Development

Linux 7.2 RISC-V Reduces Kernel Startup Overhead, Eswin SoC Support By Default - Phoronix

0.87

www.phoronix.com 2026-06-23 Phoronix

Linux 7.2 RISC-V Reduces Kernel Startup Overhead, Eswin SoC Support By Default Written by Michael Larabel in RISC-V on 23 June 2026 at 05:59 AM EDT. Add A Comment Along with the many x86/x86_64 improvements and some ARM64 architecture improvements (albeit slowed down by the AI/LLM noise affecting the development pace), the RISC-V architecture changes were merged last week for the ongoing Linux 7.2

Linux kernel RISC-V Eswin SoC SiFive HiFive kernel startup ftrace mcount_loc code cleanup

Software to Silicon With RISC-V for Physical AI

0.92

eetimes.com 2026-06-22

Discover how RISC-V is reshaping AI chip design—watch to see why it's becoming the default ISA.

RISC-V AI chip design Semiconductor industry Open source hardware Chip ecosystem AI inference acceleration Chip IP licensing Silicon design optimization

Software to Silicon With RISC-V for Physical AI - EE Times

0.92

news.google.com 2026-06-22 EE Times

Why RISC-V Is Reshaping the Future of Computing - vocal.media

0.92

vocal.media 2026-06-22 vocal.media

The race to build faster, smarter, and more efficient technology has often been dominated by a handful of established processor architectures. Yet, a quiet revolution is unfolding behind the screens we use every day. In research labs, startups, universities, and global technology companies, engineers are increasingly turning their attention toward an alternative that promises flexibility, openness

RISC-V Semiconductor Processor Architecture Open Source Hardware Computing Technology Chip Design Technology Revolution Semiconductor Industry

SpacemiT K3 Pico-ITX RISC-V Chassis Kit Review – Part 2: What works, what doesn’t in Bianbu OS 4.0 - CNX Software

0.85

www.cnx-software.com 2026-06-21 CNX Software

POSTED ON JUNE 21, 2026 BY JEAN-LUC AUFRANC (CNXSOFT) - 1 COMMENT ON SPACEMIT K3 PICO-ITX RISC-V CHASSIS KIT REVIEW – PART 2: WHAT WORKS, WHAT DOESN’T IN BIANBU OS 4.0 SpacemiT K3 Pico-ITX RISC-V Chassis Kit Review – Part 2: What works, what doesn’t in Bianbu OS 4.0 Last month, I received the SpacemiT K3 Pico-ITX Chassis Kit based on the company’s K3 16-core RISC-V SoC, and started the review wit

RISC-V SpacemiT Bianbu OS K3 SoC Pico-ITX Embedded Systems Linux Networking Performance

Pine64 Pinevoice – A $50 RISC-V Smart Speaker for Home Assistant based on Bouffalo Lab BL606P MCU - CNX Software

0.87

www.cnx-software.com 2026-06-20 CNX Software

POSTED ON JUNE 20, 2026 BY JEAN-LUC AUFRANC (CNXSOFT) - 7 COMMENTS ON PINE64 PINEVOICE – A $50 RISC-V SMART SPEAKER FOR HOME ASSISTANT BASED ON BOUFFALO LAB BL606P MCU Pine64 Pinevoice – A $50 RISC-V Smart Speaker for Home Assistant based on Bouffalo Lab BL606P MCU After over two years in the making, Pine64 has now launched the PineVoice (previously PineVox) smart speaker based on the Bouffalo La

RISC-V Smart Speaker Home Assistant Bouffalo Lab Pine64 IoT Open Source Hardware Smart Home

PineVoice smart speaker is now available for $50 (Home Assistant speaker with RISC-V processor and mic kill switch) - Liliputing

0.87

liliputing.com 2026-06-20 Liliputing

More than two years after introducing a hacker-friendly smart speaker, Pine64 is now taking orders for its answer to the Amazon Echo, Google Home, and Apple HomePod line of devices. The PineVoice* smart speaker has a lot of the features you’d expect from mainstream models. But it’s powered by a RISC-V processor and designed to work with the open source Home Assistant platform rather than propriet

smart speaker RISC-V processor open source Home Assistant privacy protection Pine64 mic kill switch IoT device

K210 puts RISC-V AI on the edge in 2018 - Jon Peddie Research

0.92

www.jonpeddie.com 2026-06-19 Jon Peddie Research

The Kendryte K210 is the chip that first proved RISC-V could run AI inference at the edge and it did it in 2018, before most of the industry was paying attention. It is the world’s first RISC-V-based edge AI chip, with 0.8 TOPS KPU, 0.3 W, TSMC 28 nm, dual-core 64-bit, and built-in audio and vision accelerators. The Sipeed Maix boards that followed put it in the hands of a million developers. Then

RISC-V Edge AI K210 chip Canaan Kendryte Sipeed AI inference Semiconductor industry

Synergy Quantum Unveils Quantum-Safe Silicon IP Cores for RISC-V-Based SoCs - PR Newswire

0.92

www.prnewswire.com 2026-06-19 PR Newswire

Synergy Quantum Unveils Quantum-Safe Silicon IP Cores for RISC-V-Based SoCs NEWS PROVIDED BY Synergy Quantum India Private Limited 18 Jun, 2026, 23:10 IST SHARE THIS ARTICLE Post-quantum cryptographic and hardware-security IP enables chipmakers to integrate quantum-safe key establishment, digital signatures, secure boot and device trust directly into RISC-V-based silicon NEW DELHI, June

Quantum-safe RISC-V Silicon IP cores Post-quantum cryptography Hardware security Chip design Digital signatures Secure boot

Synergy Quantum Unveils Quantum-Safe Silicon IP Cores for RISC-V-Based SoCs - Yahoo Finance Singapore

0.92

sg.finance.yahoo.com 2026-06-19 Yahoo Finance Singapore

This is a paid press release. Contact the press release distributor directly with any enquiries. Synergy Quantum Unveils Quantum-Safe Silicon IP Cores for RISC-V-Based SoCs PR Newswire Thu, 18 June 2026 at 10:40 am GMT-7 7 min read Post-quantum cryptographic and hardware-security IP enables chipmakers to integrate quantum-safe key establishment, digital signatures, secure boot and device trust di

Quantum-safe RISC-V Silicon IP cores Post-quantum cryptography Chip security Hardware security Digital signatures Key establishment

Space Industry is Standardizing on RISC-V - EE Times

0.75

news.google.com 2026-06-18 EE Times

Qualcomm is reportedly considering a Tenstorrent acquisition for up to 10 billion dollars: Jim Keller’s AI and RISC-V company in focus - igor´sLAB

0.92

www.igorslab.de 2026-06-18 igor´sLAB

LATEST NEWS Qualcomm is reportedly considering a Tenstorrent acquisition for up to 10 billion dollars: Jim Keller’s AI and RISC-V company in focus 18. June 2026 06:00Samir Bashir 📖 Reading time: approx. 7 minutes · 1,294 words · 8,532 characters An acquisition worth up to ten billion US dollars is not an impulsive purchase between two board meetings, even in the semiconductor industry. Qualcomm i

Semiconductor Acquisition AI Chip RISC-V Architecture Chip Design Data Center Processor Architecture Chip Integration Technology Merger

Qualcomm is reportedly considering a Tenstorrent acquisition for up to 10 billion dollars: Jim Keller’s AI and RISC-V company in focus - igor´sLAB

0.92

www.igorslab.de 2026-06-18 igor´sLAB

LATEST NEWS Qualcomm is reportedly considering a Tenstorrent acquisition for up to 10 billion dollars: Jim Keller’s AI and RISC-V company in focus 18. June 2026 06:00Samir Bashir 📖 Reading time: approx. 7 minutes · 1,294 words · 8,532 characters An acquisition worth up to ten billion US dollars is not an impulsive purchase between two board meetings, even in the semiconductor industry. Qualcomm i

Semiconductor acquisition AI chip RISC-V architecture Qualcomm Tenstorrent Chip design Data center chip Processor architecture

Space Industry Is Standardizing on RISC-V

0.92

eetimes.com 2026-06-18 Pablo Valerio

Experts at RISC-V Summit Europe outlined how open architectures are transforming computing across the space economy.

RISC-V Space Computing Semiconductor Industry Open Instruction Set European Space Agency NASA Microchip Space Processor

Qualcomm Pursues Tenstorrent at Up to $10 Billion: RISC-V Bet on Nvidia’s Blind Spot - Tech Times

0.92

www.techtimes.com 2026-06-17 Tech Times

By Eloise Jones Published: Jun 17 2026, 11:16 AM EDT Share on Facebook Share on Twitter Share on LinkedIn Share on Reddit Share on Flipboard Share on Pocket logo of US Semiconductor company Qualcomm in the Alpine resort of Davos during the World Economic Forum (WEF) annual meeting. The World Economic Forum takes place in Davos from January 19 to January 23, 2026. INA FASSBENDER/GETTY IMAGES Qual

Semiconductor AI Chip RISC-V Qualcomm Tenstorrent NVIDIA Chip Design Data Center

Semiconductor News & Analysis Feed