Allegro DVT Plays a Pivotal Role in Groundbreaking CHASSIS Automotive Base Die Development - Via TT

Allegro DVT plays a pivotal role in the European CHASSIS program, contributing to the development of the Automotive Base Die chiplet, a 5nm technology that is set to revolutionize the automotive semic... Read original →

The CHASSIS initiative leverages a 5nm automotive chiplet to fundamentally reshape the vehicle semiconductor stack. By integrating Allegro DVT’s video IP with the UCIe standard, it enables modular ADAS and infotainment upgrades—forcing EDA vendors to enhance chiplet validation flows and Tier1s to redesign domain controllers. Backed by the EU Chips Act, this coalition reduces reliance on TSMC’s leading nodes, yet faces elevated BOM costs (10–15%) due to prolonged AEC-Q100 certification and yield risks at 5nm. In response, NVIDIA may accelerate UCIe adoption in its Grace-Blackwell Automotive platform, while Qualcomm could double down on vertical integration via Snapdragon Ride Flex. Within 18 months, successful CHASSIS volume production would catalyze a global shift toward open hardware platforms, compelling legacy SoC vendors to either join the UCIe ecosystem or risk obsolescence.