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Qnity Launches AI Advanced Packaging Platform Enabling 2 µm Line/Space Metallization For 2.5D And 3D Chips - Pulse 2.0

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pulse2.com 2026-08-27

Qnity Electronics has launched an integrated materials platform for advanced semiconductor packaging, combining metallization, bumping, dielectric, and fine-line patterning technologies to support increasingly complex AI and high-performance computing architectures. The platform targets next-generat

Advanced Packaging AI Chips 3D Packaging 2.5D Packaging Chip Integration Semiconductor Materials High-Bandwidth Memory Chip Stacking

IBM Cracks the Sub-1 Nanometer Barrier with New 3D Chip Design - Bisinfotech

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www.bisinfotech.com 2026-06-29

IBM has achieved a significant breakthrough in chip technology by successfully developing sub-1 nanometer manufacturing capabilities, marking a pivotal advancement in the semiconductor industry. This milestone represents a major leap forward in chip design, as the company's novel 3D chip architectur

Semiconductor Technology Chip Design IBM 3D Chip Nanometer Technology Chip Manufacturing Integrated Circuit Technology Breakthrough

Applied launches AI 3D chip tools to power HBM and advanced packaging - CHOSUNBIZ - Chosunbiz

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biz.chosun.com 2026-06-29

Applied Materials has unveiled a suite of 3D chip manufacturing tools tailored for artificial intelligence (AI) semiconductors, focusing on advanced packaging technologies such as high bandwidth memory (HBM), chiplets, and hybrid bonding. As AI workloads grow in complexity and data throughput, the i

Semiconductor Equipment AI Chips 3D Packaging High Bandwidth Memory Chip Stacking Advanced Packaging Chemical Mechanical Polishing Electrochemical Deposition

Applied Materials targets DRAM and 3D chip stacking for AI chips - Stock Titan

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news.google.com 2026-06-25

Imec, Sony unveil backside interconnect method for 3D chip stacking

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digitimes.com 2026-06-18

Applied Materials Unveils Deposition and Selective Etch Systems to Advance 3D Chip Scaling - Yahoo Finance

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finance.yahoo.com 2026-06-16

Applied Materials unveiled two new chipmaking systems—Centris™ Spectral™ SiN ALD and Producer™ Selectra™ Mo Etch—to address critical challenges in advanced 3D semiconductor manufacturing. As the industry transitions toward gate-all-around (GAA) transistors and high-layer-count 3D NAND due to rising

Semiconductor Equipment 3D Chip Scaling Deposition Systems Etching Technology AI Chips Advanced Process High Aspect Ratio Materials Engineering

Applied Materials rolls out 3D chip tools to boost next-gen AI performance - Stock Titan

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news.google.com 2026-06-16

Applied Materials Unveils Deposition and Selective Etch Systems to Advance 3D Chip Scaling - GlobeNewswire

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www.globenewswire.com 2026-06-16

Applied Materials unveiled two new chipmaking systems—Centris™ Spectral™ SiN ALD and Producer™ Selectra™ Mo Etch—to address critical challenges in advanced 3D semiconductor manufacturing. As the industry transitions toward architectures like gate-all-around (GAA) transistors and high-layer-count 3D

Semiconductor Equipment 3D Chip Scaling Atomic Layer Deposition Etch Technology High Aspect Ratio Structures AI Chips Silicon Nitride Metal Etching

University of Illinois Team Advances Monolithic 3D Chip Design - The Quantum Insider

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thequantuminsider.com 2026-06-02

Researchers at the University of Illinois Urbana-Champaign have made a significant advancement in monolithic three-dimensional chip design, offering a promising path beyond the physical limits of traditional scaling. Led by Professor Qing Cao from the Department of Materials Science and Engineering,

3D chip Monolithic integration Silicon circuit Vertical stacking Moore's Law Chip manufacturing Materials science Quantum effects

Chinese university builds 3D chip design tool tailored to Huawei's ‘LogicFolding’ architecture — 3D design delivers increased performance and better thermal management - Tom's Hardware

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www.tomshardware.com 2026-05-28

Peking University's School of Integrated Circuits has unveiled a prototype electronic design automation (EDA) tool tailored for Huawei's LogicFolding architecture, a significant step toward domestic chip design autonomy. Unlike conventional 2D design approaches, this tool treats multi-layer chips as

3D chip design Huawei LogicFolding Electronic Design Automation Vertical chip stacking Thermal management Semiconductor process Chinese chip breakthrough Chip architecture innovation

Chinese university builds 3D chip design tool tailored to Huawei's ‘LogicFolding’ architecture

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tomshardware.com 2026-05-28

Peking University's School of Integrated Circuits has unveiled a prototype electronic design automation (EDA) tool tailored for Huawei's LogicFolding architecture, marking a significant step toward domestic chip design autonomy. Unlike conventional 2D design methods, this tool employs a true 3D appr

3D chip design Huawei LogicFolding architecture EDA tools chip performance thermal management semiconductor technology Chinese semiconductor industry

3D chip design solution lifts Synopsys stock 1.75% amid bullish technical momentum - Traders Union

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tradersunion.com 2026-05-05

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