Semiconductor News & Analysis Feed

59 articles
2026-07-07
tomshardware.com 2026-07-07 Bruno Ferreira
Unix copyright code infringement back from the dead — IBM is still under fire from Xinuos about 2003-era bytes, with a hearing as recent as June 22.
2026-07-04
aimagazine.com 2026-07-04 AI Magazine
2026-06-30
www.techdigest.tv 2026-06-30 Tech Digest
IBM ANNOUNCES POWERFUL NEW SUB-1 NM CHIP DESIGN 30 June 2026Tech Digest CorrespondentComputers Share IBM has set tech tongues wagging with the announcement of a new chip design. The US-tech company has said the new design will enable manufacturers to pack 100 billion transistors into a single silicon chip the size of a fingernail. Chips are measured in nanometres, one billionth of a metre. The c
2026-06-29
www.bisinfotech.com 2026-06-29 Bisinfotech
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2026-06-26
tomshardware.com 2026-06-26 Anton Shilov
IBM's new 0.7nm-class fabrication process uses nanostack transistors, requires 2x more FEOL steps for massive improvements in performance, power, and area.
2026-06-26
www.tomshardware.com 2026-06-26 Tom's Hardware
Tech Industry Manufacturing Semiconductors IBM goes sub-1nm, develops 0.7nm-class technology — offering up to 50% higher performance and 70% higher energy efficiency compared to IBM's 2nm-class node News By Anton Shilov published June 26, 2026 It uses two wafers instead of one, along with ultra-thin dielectric bonding (Image credit: IBM) Share this article 5 Join the conversation Follow us Add
2026-06-26
quantumzeitgeist.com 2026-06-26 Quantum Zeitgeist
DEEP TECH, TECHNOLOGY IBM’s 7 Angstrom Chips Boost Efficiency by 70% Over 2nm June 26, 2026 BY IVY DELANEY IBM has unveiled a computer chip built with transistor nodes measuring 0.7 nanometers, or 7 angstroms wide. This achievement marks the first time transistors at this scale have been realized, surpassing the current industry standard of 2 nanometer chips. In a chip the size of a fingernail, t
2026-06-26
www.silicon.co.uk 2026-06-26 Silicon UK
IBM Unveils 3D-Stacked .7nm Chip Design IBM says ‘nanostack’ approach could fit nearly 100 billion transistors into fingernail-sized area, amid soaring demand for processing power BY MATTHEW BROERSMA, JUNE 26, 2026, 8:30 AM 2 MIN IBM said a new chip design it has developed could enable processor geometries of under 1 nanometre, potentially enabling significantly more powerful and efficient chi
2026-06-26
www.silicon.co.uk 2026-06-26 Silicon UK
IBM Unveils 3D-Stacked .7nm Chip Design IBM says ‘nanostack’ approach could fit nearly 100 billion transistors into fingernail-sized area, amid soaring demand for processing power BY MATTHEW BROERSMA, JUNE 26, 2026, 8:30 AM 2 MIN IBM said a new chip design it has developed could enable processor geometries of under 1 nanometre, potentially enabling significantly more powerful and efficient chi
2026-06-26
www.lightreading.com 2026-06-26 Light Reading
Both IBM and Huawei say three-dimensional designs could improve chip performance, but IBM may have gone one better. A month ago, Huawei's executives were feeling very pleased with themselves about a purported breakthrough in chip design that would allow the Chinese vendor to wriggle out of the constraints imposed by US sanctions. They were so pleased, in fact, that they issued a rare announcement
2026-06-26
digitimes.com 2026-06-26
On June 25, IBM unveiled what it calls the world's first sub-1nm chip technology: a 0.7nm — or 7 angstrom — transistor architecture built on an entirely new 3D platform called Nanostack. The announcement, timed to the VLSI 2026 symposium, marks the first time logic technology has extended below the 1nm node and, IBM says, opens a roadmap of at least a decade of further semiconductor scaling.
2026-06-26
marklapedus.substack.com 2026-06-26 Semiecosystem
Discover more from Semiecosystem Tracking the semiconductor industry and the ecosystem Over 3,000 subscribers Subscribe By subscribing, you agree Substack's Terms of Use, and acknowledge its Information Collection Notice and Privacy Policy. Already have an account? Sign in IBM Debuts Nanostack Technology For Sub-1nm Chips Big Blue has unveiled a sub-1nm chip technology, featuring a new transistor
2026-06-26
letsdatascience.com 2026-06-26 Let's Data Science
INFRASTRUCTURE semiconductors ibm sub 1nm IBM debuts 0.7nm Nanostack with nearly 100B transistors 5 sources | June 25, 2026 8.5 Relevance Score Photo: storagereview.com · rights & takedowns QUICK SUMMARY Hide IBM unveiled the world's first sub-1 nanometer chip technology on June 25, 2026, using a new 0.7nm "Nanostack" 3D transistor architecture (also called 7 angstrom). The chip packs nearly 100
2026-06-26
hothardware.com 2026-06-26 HotHardware
IBM Just Shattered Moore's Law With Sub-1 Nanometer Chips by Zak Killian — Thursday, June 25, 2026, 01:55 PM EDT Comments IBM today announced what it calls the world's first sub-1 nanometer chip technology, unveiling a new 0.7nm (7 angstrom) semiconductor process built around an entirely new transistor architecture dubbed "nanostack." The announcement is significant not only because it pushes se
2026-06-26
www.inavateonthenet.net 2026-06-26 Inavate Magazine
IBM ‘block of flats’ chip design could put 100 billion transistors on a silicon chip NEWS 25/06/2026 IBM has unveiled a new chip design which could allow 100 billion transistors on a silicon chip as small as a human fingernail. IBM’s new chip technology is the equivalent of around 0.7 nanometres, which could make it the world’s first chip technology below one nanometre. The company claims th
2026-06-26
www.androidauthority.com 2026-06-26 Android Authority
Affiliate links on Android Authority may earn us a commission. Learn more. Only a few years back, we were still looking forward to smartphone chips manufactured on a 2nm process as the next big thing. Fabrication advancements have now made 2nm chips a reality — so what’s next? Engineers have already been pushing the limits of physics for a while now, and although they’re probably going to come up
2026-06-25
www.datacenterknowledge.com 2026-06-25 Data Center Knowledge
IBM’s NanoStack transistor platform promises to extend chip scaling beyond nanosheets, offering improvements in AI performance, memory density, and energy efficiency. IBM has developed what it calls the world’s first sub-1-nanometer semiconductor technology, unveiling a new transistor architecture designed to extend chip scaling as AI workloads drive demand for more compute and greater energy eff
2026-06-25
finimize.com 2026-06-25 Finimize
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2026-06-25
www.cnbc.com 2026-06-25 CNBC
Sign up for free newsletters and get more CNBC delivered to your inbox Get this delivered to your inbox, and more info about our products and services. © 2026 Versant Media, LLC. All Rights Reserved. A Versant Media Company. Data is a real-time snapshot *Data is delayed at least 15 minutes. Global Business and Financial News, Stock Quotes, and Market Data and Analysis. This site is now part of
2026-06-25
morethanmoore.substack.com 2026-06-25 More Than Moore
Discover more from More Than Moore The latest in semiconductors: silicon, AI, processors, market trends. Over 12,000 subscribers Subscribe By subscribing, you agree Substack's Terms of Use, and acknowledge its Information Collection Notice and Privacy Policy. Already have an account? Sign in IBM Announces 0.7nm Process Node, Introduces NanoStack 666 Million Transistors Per Square Millimeter DR. IA