Semiconductor News & Analysis Feed
142 articles
2026-06-27
news.vt.edu
2026-06-27
Virginia Tech News
Related Content
Article Item
Category:
IMPACT
New May Family Foundation Fellowship Challenge expands support for engineering graduate students
, article
Article Item
Lingjia Liu named Boeing Endowed Professor
, article
Video Item
Category:
ACADEMICS
Using virtual reality to train the next generation of semiconductor workers
, video
MORE STORIES FROM THE COLLEGE OF ENGINEERING
MORE STORIES FROM GRA
2026-06-27
www.design-engineering.com
2026-06-27
Design Engineering Magazine
onsemi has announced its acquisition of Synaptics Incorporated in an all-stock deal valued at approximately $7 billion. The agreement features a fixed exchange ratio of 1.350 shares of onsemi stock for each Synaptics share, reflecting a 19% premium based on recent trading prices.
This acquisition positions onsemi to better meet the growing demand for intelligent systems across various sectors, in
2026-06-26
news.google.com
2026-06-26
Ad-hoc-news.de
2026-06-26
digitimes.com
2026-06-26
Academia Sinica has built a 20-qubit quantum chip from scratch, and the team now says the next phase is less about lab breakthroughs and more about engineering a scalable, reproducible manufacturing system. Chii-Dong Chen, executive director of Academia Sinica's Center for Quantum Computer, says Taiwan's quantum chip effort is moving into that engineering battleground.
2026-06-25
semiengineering.com
2026-06-25
Semiconductor Engineering
In Part 1, we looked at the innovations underpinning the Cerebras WSE-3 and why its most significant breakthrough is the elimination of data movement overhead at the architectural level, not better yield management or thermal engineering. Cerebras’ on-wafer fabric is a viable answer to the question being asked by the entire industry: how do you move data fast enough that compute stops waiting?
Th
2026-06-25
semiengineering.com
2026-06-25
Semiconductor Engineering
Can engineers trust AI to get everything right in semiconductor design and verification?
Semiconductor Engineering sat down to discuss the pros and cons of using agentic AI in chip design and verification, with Cindy Cui, vice president of global customer success at ChipAgents; Wally Rhines, CEO of Silvaco; Shelly Henry, CEO of Moores Lab AI; Dave Kelf, CEO of Breker Verification Systems; Vince W
2026-06-25
semiengineering.com
2026-06-25
Semiconductor Engineering
A fine-tuned model brings frontier-level AI performance to chip design.
By Tanay Biradar, Surya Gunukula, Tengxiao Liu, and Kexun Zhang
ChipAgents has introduced Renoir, an agentic large language model (LLM) whose name means “renew.” In early chip design benchmarks, Renoir outperforms the base model it was trained on and cuts costs by more than half. Furthermore, it can run entirely on-premises,
2026-06-24
news.google.com
2026-06-24
Princeton Engineering
2026-06-23
www.genengnews.com
2026-06-23
Genetic Engineering and Biotechnology News
www.genengnews.com
Performing security verification
This website uses a security service to protect against malicious bots. This page is displayed while the website verifies you are not a bot.
Ray ID: a10ba6c25f923c60
Performance and Security by Cloudflare
Privacy
2026-06-23
www.genengnews.com
2026-06-23
Genetic Engineering and Biotechnology News
www.genengnews.com
Performing security verification
This website uses a security service to protect against malicious bots. This page is displayed while the website verifies you are not a bot.
Ray ID: a10b99eeb9b4e6ec
Performance and Security by Cloudflare
Privacy
2026-06-23
www.engineering.com
2026-06-23
Engineering.com
www.engineering.com
Performing security verification
This website uses a security service to protect against malicious bots. This page is displayed while the website verifies you are not a bot.
Ray ID: a10948e81c8cc5b5
Performance and Security by Cloudflare
Privacy
2026-06-23
www.engineering.com
2026-06-23
Engineering.com
www.engineering.com
Performing security verification
This website uses a security service to protect against malicious bots. This page is displayed while the website verifies you are not a bot.
Ray ID: a108ef7c7dabf784
Performance and Security by Cloudflare
Privacy
2026-06-23
semiengineering.com
2026-06-23
Semiconductor Engineering
Redesigning high-NA EUV; embedded liquid cooling; light wavelength analysis.
A researcher from the Okinawa Institute of Science and Technology (OIST) proposes redesigning the illumination systems and projectors used in high-NA EUV lithography to reduce optical effects and enhance resolution.
In the proposed projector design, the collector mirrors in the illumination system have a simpler design
2026-06-23
tomshardware.com
2026-06-23
Andrew E. Freedman
We talked to Valve engineers Pierre-Loup Griffais and Yazan Aldehayyat ahead of the Steam Machine's launch to learn more about its pricing, engineering, and how the company is handling availability.
2026-06-23
www.engineering.com
2026-06-23
Engineering.com
www.engineering.com
Performing security verification
This website uses a security service to protect against malicious bots. This page is displayed while the website verifies you are not a bot.
Ray ID: a1066c956c36d6dc
Performance and Security by Cloudflare
Privacy
2026-06-22
semiengineering.com
2026-06-22
Semiconductor Engineering
Rising mask costs, tighter high-NA requirements, and new materials challenges are forcing chipmakers to weigh litho choices against volume, design strategy, and total process cost.
Experts at the table: Semiconductor Engineering sat down to discuss new mask technology challenges with Aki Fujimura, CEO at D2S; Glen Scheid, operations manager at Micron; Harry Levinson, principal lithographer at HJL
2026-06-19
news.google.com
2026-06-19
Semiconductor Engineering
2026-06-18
semiengineering.com
2026-06-18
Semiconductor Engineering
Skip to main content
Enable accessibility for low vision
Open the accessibility menu
Submit
SUBSCRIBE
Chinese (Simplified) English
HOME
SYSTEMS & DESIGN
LOW POWER - HIGH PERFORMANCE
MANUFACTURING, PACKAGING & MATERIALS
TEST, MEASUREMENT & ANALYTICS
AUTO, SECURITY & EDGE AI
SPECIAL REPORTS
BUSINESS & STARTUPS
JOBS
KNOWLEDGE CENTER
TECHNICAL PAPERS
EVENTS & WEBINARS
VIDEOS & RESEARCH
NEWSLETTERS
2026-06-18
interestingengineering.com
2026-06-18
Interesting Engineering
From daily news and career tips to monthly insights on AI, sustainability, software, and more—pick what matters and get it in your inbox.
Discover the engineering revolution transforming modern defense with Strength, Stealth, Speed: The Very Fast Future of Advanced Defense
Access expert insights, exclusive content, and a deeper dive into engineering and innovation all with fewer ads or a complet
2026-06-18
semiengineering.com
2026-06-18
Semiconductor Engineering
As logic devices transition from FinFETs to more complex gate-all-around (GAA) architectures, manufacturing variability has become a major barrier to achieving high yield.1,2 Hundreds of tightly coupled process steps now contribute to yield loss, making traditional wafer-based optimization slow, expensive, and often limited to addressing one failure mode at a time.3,4,5
To overcome these challeng