Semiconductor News & Analysis Feed
303 articles
2026-07-01
www.bisinfotech.com
2026-07-01
Bisinfotech
2026-07-01
www.bisinfotech.com
2026-07-01
Bisinfotech
2026-07-01
quantumzeitgeist.com
2026-07-01
Quantum Zeitgeist
2026-06-30
www.techdigest.tv
2026-06-30
Tech Digest
IBM ANNOUNCES POWERFUL NEW SUB-1 NM CHIP DESIGN
30 June 2026Tech Digest CorrespondentComputers
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IBM has set tech tongues wagging with the announcement of a new chip design. The US-tech company has said the new design will enable manufacturers to pack 100 billion transistors into a single silicon chip the size of a fingernail.
Chips are measured in nanometres, one billionth of a metre. The c
2026-06-30
digitimes.com
2026-06-30
Arm Holdings says its chip architecture has crossed the 50% threshold in the hyperscale cloud market, a milestone in a segment long dominated by Intel and AMD. The SoftBank-backed chip designer is now pushing further into the hardware business itself, even as supply chains strain under the weight of the AI infrastructure buildout.
2026-06-30
semiengineering.com
2026-06-30
Semiconductor Engineering
Researchers from ETH Zurich, lowRISC, and University of Bologna published a technical paper titled “Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon.”
This paper describes Croc, an open-source, customizable RISC-V SoC platform and teaching flow that lets students take domain-specific chip-design projects from architecture and RTL through physical
2026-06-29
www.bisinfotech.com
2026-06-29
Bisinfotech
www.bisinfotech.com
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2026-06-27
www.ad-hoc-news.de
2026-06-27
Ad-hoc-news.de
Cadence Design Systems, US12541W1027
Cadence Design Systems refines AI chip design focus, shares sit near Nasdaq highs
27.06.2026 - 11:05:15 | ad-hoc-news.de
Cadence Design Systems centers its strategy on AI-accelerated electronic design automation and hardware, with the Nasdaq-listed shares trading close to record territory after a robust first half of the year.
Cadence Design Systems, US12541W
2026-06-26
futurumgroup.com
2026-06-26
The Futurum Group
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2026-06-26
nasilemaktech.com
2026-06-26
Nasi Lemak Tech
nasilemaktech.com
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2026-06-26
www.tech-critter.com
2026-06-26
Tech Critter
Cadence has announced a deeper, multi-year partnership with Intel Foundry to accelerate Team Blue’s development in next-generation 14A manufacturing process.
The collaboration expands beyond existing work by combining Cadence’s AI-powered electronic design automation (EDA) tools and design IP portfolio with Intel’s process technology and packaging expertise, giving chip designers a more optimized
2026-06-26
quantumzeitgeist.com
2026-06-26
Quantum Zeitgeist
QUANTUM RESEARCH NEWS, QUANTUM HARDWARE
$4M Boosts U-M’s Quantum Photonic Chip Design to Stage 2 NSF
June 26, 2026
BY RUSTY FLINT
A 4 million investment is propelling a University of Michigan Engineering-led team closer to building practical quantum technology, advancing their project to Stage 2 of a National Science Foundation competition. The team aims to develop plug-and-play photonic chips ca
2026-06-26
www.silicon.co.uk
2026-06-26
Silicon UK
IBM Unveils 3D-Stacked .7nm Chip Design
IBM says ‘nanostack’ approach could fit nearly 100 billion transistors into fingernail-sized area, amid soaring demand for processing power
BY MATTHEW BROERSMA, JUNE 26, 2026, 8:30 AM
2 MIN
IBM said a new chip design it has developed could enable processor geometries of under 1 nanometre, potentially enabling significantly more powerful and efficient chi
2026-06-26
www.silicon.co.uk
2026-06-26
Silicon UK
IBM Unveils 3D-Stacked .7nm Chip Design
IBM says ‘nanostack’ approach could fit nearly 100 billion transistors into fingernail-sized area, amid soaring demand for processing power
BY MATTHEW BROERSMA, JUNE 26, 2026, 8:30 AM
2 MIN
IBM said a new chip design it has developed could enable processor geometries of under 1 nanometre, potentially enabling significantly more powerful and efficient chi
2026-06-26
www.inavateonthenet.net
2026-06-26
Inavate Magazine
IBM ‘block of flats’ chip design could put 100 billion transistors on a silicon chip
NEWS
25/06/2026
IBM has unveiled a new chip design which could allow 100 billion transistors on a silicon chip as small as a human fingernail.
IBM’s new chip technology is the equivalent of around 0.7 nanometres, which could make it the world’s first chip technology below one nanometre.
The company claims th
2026-06-26
www.androidauthority.com
2026-06-26
Android Authority
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Only a few years back, we were still looking forward to smartphone chips manufactured on a 2nm process as the next big thing. Fabrication advancements have now made 2nm chips a reality — so what’s next? Engineers have already been pushing the limits of physics for a while now, and although they’re probably going to come up
2026-06-26
www.datacenterdynamics.com
2026-06-26
Data Center Dynamics
OpenAI is hiring for a deal lead to form "high-value" partnerships with semiconductor companies.
The new hire is expected to pitch the use of OpenAI's AI models in chip development and company operations. The position and effort has not been previously reported.
The AI Hardware Supplement
Inside the AI server
18 Jun 2026
The role is part of OpenAI's 'Special Situations' team, "the company’s c
2026-06-25
eetimes.com
2026-06-25
The custom inference accelerator follows the hyperscaler playbook, but the AI-automated chip design process could prove the more consequential announcement.
2026-06-25
news.google.com
2026-06-25
EE Times
2026-06-25
www.datacenterknowledge.com
2026-06-25
Data Center Knowledge
IBM’s NanoStack transistor platform promises to extend chip scaling beyond nanosheets, offering improvements in AI performance, memory density, and energy efficiency.
IBM has developed what it calls the world’s first sub-1-nanometer semiconductor technology, unveiling a new transistor architecture designed to extend chip scaling as AI workloads drive demand for more compute and greater energy eff