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IBM has achieved a major breakthrough in semiconductor manufacturing by developing the industry's first sub-1nm fabrication process, the 0.7nm-class technology. This innovation is based on a novel nanostack transistor architecture that delivers significant improvements in performance, power efficien

IBM has announced the development of the industry's first sub-1nm fabrication process, a 0.7nm-class technology based on nanostack transistors. Compared to its 2nm node, this new process delivers up to 50% higher performance and 70% better energy efficiency. The innovation uses a dual-wafer approach

IBM unveiled the world's first sub-1 nanometer chip technology on June 25, 2026, introducing the 0.7nm (7 angstrom) Nanostack 3D transistor architecture. This breakthrough enables nearly 100 billion transistors on a fingernail-sized die—nearly double the density of IBM's 2nm chip from 2021. The desi

IBM announced its latest 0.7nm process node technology and introduced NanoStack, marking a significant step forward in the semiconductor industry's evolution beyond traditional Moore’s Law. Based on Gate-All-Around (GAA) architecture, the technology advances toward Complimentary FET (CFET) structure