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EMERGING TECHNOLOGIES Huawei is unveiling a new 3D chip design it says can close the gap with global leaders The Chinese tech giant says its new stacked-chip architecture can deliver transistor density equivalent to 1.4nm processes by 2031, without access to advanced lithography tools By Cris Tolomia Share to X Share to Facebook Share to Reddit Share to Email Share to Link Published 16 minutes ago

Artificial intelligence/Huawei Announces LogicFolding: 3D Density Without EUV Machines, Targeting 1.4 nm by 2031 Table of contents A Temporal Scaling Law to Succeed Moore LogicFolding: 3D Against EUV, and Its Shades A 3D Architecture That Isn't Uniquely Huawei's He Tingbo, the Tutelary Figure of HiSilicon On May 25, 2026, He Tingbo, president of Huawei's semiconductor department and board member

Powerchip announced it will present a "3D AI Foundry" showcase at COMPUTEX 2026 to demonstrate 3D wafer-on-wafer (WoW) DRAM stacking, interposers, and Si-cap integrated passive devices as part of an end-to-end offering for AI chips, addressing rising demand for GenAI and high-performance computing for memory capacity, bandwidth, and energy efficiency. The firm said it is leveraging its combined lo

Flagship Huawei Mate 90 series will be the first commercial processors to feature the LogicFolding architecture

Tech Industry Manufacturing Semiconductors Huawei claims sanctions-busting breakthrough with 1.4nm-class chips by 2031, claims 55% higher transistor density — firm claims new LogicFolding chip architecture can bypass EUV restrictions, introduces 'Tau Scaling Law' to replace Moore's Law News By Etiido Uko published 11 hours ago Flagship Huawei Mate 90 series will be the first commercial processo

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