Semiconductor News & Analysis Feed
20 articles
2026-08-21
www.digitimes.com
2026-08-21
2026-08-21
www.digitimes.com
2026-08-21
2026-08-13
www.digitimes.com
2026-08-13
Samsung Electronics plans to introduce high-numerical-aperture extreme ultraviolet (High-NA EUV) lithography into mass production at its 1nm node around 2030, according to South Korean media reports. This announcement underscores the semiconductor industry's ongoing pursuit of advanced manufacturing
2026-08-13
www.digitimes.com
2026-08-13
2026-08-12
www.tomshardware.com
2026-08-12
2026-08-12
finance.biggo.com
2026-08-12
Samsung Electronics has delayed its adoption timeline for ASML's next-generation High-NA extreme ultraviolet lithography equipment, reserving the costly technology for its 1-nanometer chip manufacturing process expected around 2030. This strategic move aligns Samsung with competitor TSMC in adopting
2026-08-11
2026-08-11
techgenyz.com
2026-08-11
Samsung is reportedly delaying the widespread adoption of High-NA EUV technology for its 1nm chip manufacturing until around 2030, aligning with its long-term roadmap rather than immediate advanced-node production. While High-NA EUV offers superior patterning capabilities compared to conventional EU
2026-08-11
www.kucoin.com
2026-08-11
At the 2026 Next-Generation Lithography + Patterning Academic Conference, Samsung confirmed that it plans to adopt High-NA EUV as its primary manufacturing technology starting from the 1nm (A10) node around 2030. Prior to this, nodes such as 2nm, 1.4nm, and early 1nm will continue to rely on 0.33 NA
2026-08-11
bits-chips.com
2026-08-11
2026-07-21
www.eenewseurope.com
2026-07-21
2026-06-26
tomshardware.com
2026-06-26
IBM has achieved a major breakthrough in semiconductor manufacturing by developing the industry's first sub-1nm fabrication process, the 0.7nm-class technology. This innovation is based on a novel nanostack transistor architecture that delivers significant improvements in performance, power efficien
2026-06-26
www.tomshardware.com
2026-06-26
IBM has announced the development of the industry's first sub-1nm fabrication process, a 0.7nm-class technology based on nanostack transistors. Compared to its 2nm node, this new process delivers up to 50% higher performance and 70% better energy efficiency. The innovation uses a dual-wafer approach
2026-06-26
digitimes.com
2026-06-26
IBM's unveiling of sub-1nm chip technology at the 2026 VLSI symposium represents a significant breakthrough in semiconductor manufacturing, introducing the world's first 0.7nm transistor architecture built on the novel 3D Nanostack platform. This advancement addresses fundamental physical limitation
2026-06-26
marklapedus.substack.com
2026-06-26
IBM has unveiled its novel Nanostack transistor technology aimed at sub-1nm chips, marking a significant leap in semiconductor design beyond traditional 2D layouts. This 3D-like architecture vertically stacks and staggers transistors, enabling a density nearly twice that of IBM's 2nm chip, with near
2026-06-25
www.chosun.com
2026-06-25
IBM unveiled the world's first sub-1 nanometer semiconductor process technology on June 25, 2026, marking a significant leap in chip manufacturing. The technology employs an innovative 'nanostack' architecture that increases integration density through vertical stacking, offering 50% better computin
2026-06-22
www.digitimes.com
2026-06-22
Japanese bathroom fixture maker Toto is intensifying its semiconductor industry commitment, investing JPY80 billion over five years to expand advanced ceramic material production for chips. This move reflects AI's profound impact on the semiconductor industry as it advances toward the 1nm era. The i
2026-06-22
2026-05-18
2026-05-03